In the field of cochlear implants, electrostimulation of the acoustic nerve by the technique of continuous interleaved sampling (CIS) has successfully achieved high levels of speech recognition. The signal processing used in CIS, as implemented in an external speech processor, commonly employs a filter bank for splitting up the audio frequency range. The amplitudes of the stimulation pulses within the cochlea are derived from the envelopes of the band pass filter output signals.
At present, commercially available Digital Signal Processors (DSP) are used to perform speech processing according to CIS. For example, the digital signal processing for a 12-channel CIS typically comprises the following stages:
(1) a digital filter bank having 12 digital Butterworth band pass filters of 6th order, Infinite Impulse Response (IIR) type; PA1 (2) 12 subsequent rectifiers and 12 digital Butterworth low pass filters of 2nd order, IIR-type, for envelope detection; and PA1 (3) a stage for patient specific estimation of the stimulation amplitudes from the envelope signals.
The DSP power consumption in a speech processor typically is about 300 mW. Thus, comparatively large batteries (usually AA-sized) are necessary, resulting in speech processor dimensions of about 90.times.70.times.20 mm.sup.3.